Semiconductor device testing apparatus

ABSTRACT

A semiconductor device testing apparatus having a reduced transverse width and compact in size is provided. Adjacent to a constant temperature chamber 101 containing therein a vertical transport means is located a test chamber 102 which is in turn adjoined by a temperature-stress removing chamber 103 likewise containing therein a vertical transport means, so that the constant temperature chamber 101, the test chamber 102 and the temperature-stress removing chamber 103 are arranged transversely in a line. Further, a loader section 300 is located in front of the constant temperature chamber, and an unloader section 400 is located in front of the test chamber and the temperature-stress removing chamber. With this arrangement, the transverse width of the testing apparatus may be reduced to about three test tray lengths.

BACKGROUND OF THE INVENTION

1. Field of the Invention

The present invention relates to a semiconductor device testingapparatus suitable for testing one or more semiconductor devices,particularly one or more semiconductor integrated circuit elements (aswill be referred to as IC or ICs hereinafter) which are typical examplesof the semiconductor devices. More particularly, the present inventionrelates to a semiconductor device testing apparatus of the type in whichICs to be tested are transported, for testing, to a test or testingsection where they are brought into electrical contact with a testerhead (a component of the testing apparatus for applying and receivingvarious electrical signals for testing), followed by being carried outof the testing section and then being sorted out into conformable orpass articles and unconformable or failure articles on the basis of thetest results.

2. Background of the Related Art

Many of the semiconductor device testing apparatuses (commonly called ICtesters) for applying a test signal of a predetermined pattern to asemiconductor device to be tested, i.e. device under test (commonlycalled DUT) and measuring the electrical characteristics of the devices,have a semiconductor device transporting and handling or processingapparatus (commonly called handler) mounted or connected thereto. Thehandler which transports semiconductor devices to a testing section,brings them into electrical contact with a tester head in the testingsection, and, after the testing, carries the tested semiconductordevices out of the testing section, and sorts them out into passarticles and failure articles on the basis of the test results. In thespecification, the testing apparatus which comprises a combination ofthe IC tester and the IC handler connected thereto or integrally mountedthereto of the type described above is termed "semiconductor devicetesting apparatus". In the following disclosure the present inventionwill be described by taking ICs typical of semiconductor devices forexample for clarity of explanation.

A description will be given first regarding the general construction ofa conventional IC testing apparatus with reference to FIGS. 4 and 5.FIG. 4 is a plan view of the IC testing apparatus schematically showing,in perspective, a chamber section 100. In addition to the chambersection 100, the illustrated IC testing apparatus further comprises anIC storage section 200 where ICs that will undergo a test (i.e., ICs tobe tested) are stored and the tested ICs are sorted and stored in place,a loader section 300 where ICs to be tested which a user has beforehandloaded on a general-purpose tray (customer tray) KST are transferred andreloaded onto a test tray TST capable of withstanding high/lowtemperatures, and an unloader section 400 where the tested ICs whichhave been carried on the test tray TST out of the chamber section 100subsequently to undergoing a test in the testing chamber 100 aretransferred from the test tray TST to one or more general-purpose traysKST to be reloaded on the latter. The unloader section 400 is generallyconstructed to sort the tested ICs on the basis of the test results andload them on the corresponding general-purpose trays.

The chamber section 100 comprises a constant temperature or thermostaticchamber 101 for receiving the ICs to be tested loaded on the test trayTST and imposing an intended high or low temperature stress to the ICs,a test or testing chamber 102 for effecting an electrical test on theICs subjected to the temperature stress in the constant temperaturechamber 101, and a temperature-stress removing chamber 103 for removingthe temperature stress of the ICs having been applied thereto in thetest chamber 102 from the ICs. The test chamber 102 contains therein atester head 104 of the testing apparatus, supplies various electricsignals for testing via the tester head 104 to the ICs to be tested inelectrically contact therewith, receives response signals from the ICs,and sends them to the testing apparatus.

Each of the test trays TST is moved in a circulating manner from theloader section 300 through the constant temperature chamber 101 of thechamber section 100, the test chamber 102 of the chamber section 100,the temperature-stress removing chamber 103 of the chamber 100, and theunloader section 400 in this order, to the loader section 300. Theconstant temperature chamber 101 and the temperature-stress removingchamber 103 are taller than the test chamber 102, and have upwardportions protruding beyond the top of the test chamber 102,respectively. As shown in FIG. 5, a base plate 105 spans between theupward protruding portions of the constant temperature chamber 101 andthe temperature-stress removing chamber 103, and a test tray conveyingmeans 108 is mounted on the base plate 105 to transport the test trayTST from the temperature-stress removing chamber 103 to the constanttemperature chamber 101.

In case the ICs to be tested have been heated to a high temperature (inthis example, a thermal stress is applied to the ICs) in the constanttemperature chamber 101, the temperature-stress removing chamber 103cools the tested ICs down to room temperature by blowing, after whichthey are transported to the unloader section 400. On the other hand, incase the ICs to be tested have been cooled down or freezed to, forinstance, -30° C. (in this example, a cryogenic stress is applied to theICs) in the constant temperature chamber 101, the temperature-stressremoving chamber 103 heats the tested ICs by warm air or a heater up toa temperature at which the ICs have no dew condensation, and then theyare removed from the temperature-stress removing chamber 103 to theunloader section 400.

The test tray TST with the ICs loaded thereon in the loader section 300is conveyed from the loader section to the constant temperature chamber101 within the chamber section 100. The constant temperature chamber 101has a vertical conveyor means mounted therein which is adapted tosupport a plurality of (nine, for instance) test trays TST in the formof a stack. In the illustrated example, the vertical conveyor meansstacks the transported test trays such that a test tray newly receivedfrom the loader section 300 is supported at the uppermost of the stackwhile the bottom test tray is delivered to the test chamber 102. The ICsto be tested on the uppermost test tray TST are given a predeterminedhigh or low temperature stress while the associated test tray TST ismoved sequentially from the top to the bottom of the stack by verticallydownward movement of the vertical conveyor means and/or waits until theimmediately preceding test tray is brought out of the test chamber 102.The tester head 104 is disposed in the test chamber 102 at the centralarea thereof, and each of the test trays TST carried out one by one fromthe constant temperature chamber 101 is conveyed onto the tester head104 while being maintained at the constant temperature, and apredetermined number of the ICs among the ICs on the associated testtray TST are electrically connected to IC sockets (not shown) mounted onthe tester head 104, as will be discussed hereinbelow. Upon completionof the test on all of the ICs placed on one test tray TST through thetester head 104, the test tray TST is transported to thetemperature-stress removing chamber 103 where the tested ICs on theassociated test tray are relieved of heat to be restored to the ambientor room temperature, and thereafter the test tray TST is discharged tothe unloader section 400.

Like the constant temperature chamber 101 as described above, thetemperature-stress removing chamber 103 is also equipped with a verticalconveyor means adapted to support a plurality of (nine, for instance)test trays TST stacked one on another. In the illustrated example, thetest tray TST newly received from the test chamber 102 is supported atthe bottom of the stack while the uppermost test tray is discharged tothe unloader section 400. The tested ICs on the associated test tray arerelieved of heat to be restored to the outside temperature (roomtemperature) as the associated test tray TST is moved from the bottom tothe top of the stack by vertically upward movement of the verticalconveyor means.

The tested ICs as carried on the test tray TST are passed to theunloader section 400 where they are sorted out by categories based onthe test results and transferred from the test tray TST onto and storedin the corresponding general-purpose trays for respective categories.The test tray TST thus emptied in the unloader section 400 istransported to the loader section 300 where it is again loaded with ICsto be tested from a general-purpose tray KST onto the test tray TST,after which the same steps of above-described operation are repeated.

As shown in FIG. 5, an IC transfer means for transferring ICs from ageneral-purpose tray KST to a test tray TST in the loader section 300may be in the form of X and Y direction transfer means 304 whichcomprises a pair of spaced parallel rails 301 mounted on the base plate105 and extending over the loader section 400 in the front-to-back orforward-rearward direction of the testing apparatus (referred to as theY direction herein), a movable arm 302 which spans between the two rails301 and has its opposite ends secured thereto in a manner to be movablein the Y direction, and a movable head 303 which is supported by themovable arm 302 in a manner to be movable in the direction in which themovable arm 302 extends, that is. in the left to right direction of thetesting apparatus (referred to as the X direction herein). With thisarrangement, the movable head 303 is allowed to reciprocate between thetest tray TST and the general-purpose tray KST in the Y direction andmove along the movable arm 302 in the X direction.

On the underside of the movable head 303 are vertically movably mountedIC suction pads. Through the movement of the movable head 303 in the Xand Y directions and the downward movement of the suction pads incombination, the suction pads are brought into abutment with the ICsplaced on the general-purpose tray KST and pick them up and hold theretoby vacuum suction to transfer them to the test tray TST. The number ofsuction pads that are mounted on the movable head 303 may be eight, forinstance, so that a total of eight ICs may be transferred from thegeneral-purpose tray KST to the test tray TST at one time.

It is to be noted here that means 305 for correcting the position of anIC called "preciser" (FIG. 5) is located between stopping positions forthe general-purpose tray KST and the test tray TST. The positioncorrecting means 305 includes relatively deep recesses into which theICs as being attracted against the suction pads are once released tofall prior to being transferred to the test tray TST. The recesses areeach defined by vertical tapered side walls which prescribe for thepositions at which the ICs drop into the recesses by virtue of thetapering. After eight ICs have been precisely positioned relative toeach other by the position correcting means 305, those eight ICsaccurately positioned are again attracted against the suction pads andconveyed to the test tray TST. The reason that the position correctingmeans 305 is provided is as follows. Recesses of the general-purposetray TST for holding the ICs are sized larger as compared to the size ofICs, resulting in wide variations in positions of ICs placed on thegeneral-purpose tray KST. Consequently, if the ICs as such were vacuumpicked up by the suction pads and transferred directly to the test trayTST, there might be some of the ICs which could not be successfullydeposited into the IC storage recesses formed in the test tray TST. Thisis the reason for requiring the position correcting means 305, asdescribed above which acts to array ICs as accurately as the array ofthe IC storage recesses formed in the test tray TST.

The unloader section 400 is equipped with two sets of X and Y directiontransfer means 404 which are identical in construction to the X and Ydirection transfer means 304 provided for the loader section 300. The Xand Y direction transfer means 404 performs to transship the tested ICsfrom the test tray TST delivered out to the unloader section 400 ontothe general-purpose tray KST. Each set of the X and Y direction transfermeans 404 comprises a pair of spaced parallel rails 401 mounted toextend in the forward-rearward direction of the testing apparatus (Ydirection), a movable arm 402 spanning between the pair of rails 401 andmovably mounted at opposite ends on the pair of rails 401 in the Ydirection, and a movable head 403 mounted on the movable arm 402 formovement therealong longitudinally of the arm, that is, in the right toleft direction of the testing apparatus (X direction).

FIG. 6 shows the construction of one example of the test tray TST. Theillustrated test tray TST comprises a rectangular frame 12 having aplurality of equally spaced apart parallel cleats 13 between the opposedside frame members 12a and 12b of the frame, each of the cleats 13having a plurality of equally spaced apart mounting lugs 14 protrudingtherefrom on both sides thereof and each of the side frame members 12a,12b opposing the adjacent cleats having similar mounting lugs 14protruding therefrom. The mounting lugs 14 protruding from the opposedsides of each of the cleats 13 are arranged such that each of themounting lugs 14 protruding from one side of the cleat 13 is positionedintermediate two adjacent mounting lugs 14 protruding from thy oppositeside of the cleat. Similarly, each of the mounting lugs 14 protrudingfrom each of the side frame members 12a and 12b is positionedintermediate two adjacent mounting lugs 14 protruding from the opposedcleat. Formed between each pair of opposed cleats 13 and between each ofthe side frame members 12a and 12b and the opposed cleats are spaces foraccommodating a multiplicity of IC carriers 16 in juxtaposition. Morespecifically, each IC carrier 16 is accommodated in one of an array ofrectangular carrier compartments 15 defined in each of said spaces, eachcompartment 15 including two staggered, obliquely opposed mounting lugs14 located at the diagonally opposed corners of the compartment. In theillustrated example wherein each cleat 13 has sixteen mounting lugs 14on either side thereof, there are sixteen carrier compartments 15 formedin each of the cleats, in which sixteen IC carriers 16 are mounted.Since there are four of the spaces, 16×4, that is, 64 IC carriers intotal can be mounted in one test tray TST. Each IC carrier 16 is placedon corresponding two mounting lugs 14 and fixed thereto by fasteners 17.

Each of IC carriers 16 is of identical shape and size in its outercontour and has an IC pocket 19 in the center for accommodating an ICelement therein. The shape and size of the IC pocket 19 is determineddepending on those of the IC element 18 to be accommodated therein. Inthe illustrated example, the IC pocket 19 is in the shape of a generallysquare recess. The outer dimensions of the IC pocket 19 are sized so asto be loosely fitted in the space defined between the opposed mountinglugs 14 in the carrier compartment 15. The IC carrier 16 has flanges atits opposed ends adapted to rest on the corresponding mounting lugs 14,these flanges having mounting holes 21 and holes 22 formed therethrough,respectively, the mounting holes 21 being adapted to receive fasteners17 therethrough and the holes 22 being adapted to pass locating pinstherethrough.

In order to prevent IC elements from slipping out of place within the ICcarrier 16 or jumping out of the IC carrier 16, a pair of latches 23 areattached to the IC carrier 16, as shown in FIG. 7. These latches 23 areintegrally formed with the body of the IC carrier so as to extendupwardly from the base of the IC pocket 19, and are normally resilientlybiased such that the top end pawls are urged toward each other by virtueof the resiliency of the resin material of which the IC carrier is made.When the IC element is to be deposited into or removed from the ICpocket 19, the top ends of the two latches 23 are expanded away fromeach other by a latch releasing mechanism 25 disposed on opposite sidesof an IC suction pad 24 for picking up an IC element prior toeffectuating the deposition of the IC element into or removal from theIC pocket 19. Upon the latch releasing mechanism 25 being moved out ofengagement with the latches 23, the latches 23 will snap back to theirnormal positions by their resilient forces where the deposited IC isheld in place against dislodgement by the top end pawls of the latches23.

The IC carrier 16 holds an IC element in place with its leads or pins 18exposed downwardly as shown in FIG. 8. The tester head 104 has an ICsocket mounted thereto, and contacts 31 of the IC socket upwardly extendfrom the top surface of the tester head 104. The exposed leads 18 of theIC element are pushed against the contacts 31 of the IC socket toestablish electrical connection between the IC element and the socket.To this end, a pusher 30 for pushing and holding an IC element down ismounted above the tester head 104 and is configured to push the ICelement accommodated in an IC carrier 16 from above into contact withthe tester head 104.

The number of IC elements which may be connected with the tester head104 at a time depends on the number of IC sockets mounted on the testerhead 104. By way of example, where sixty-four IC elements are arrangedin an array of 4 lines×16 rows on a test tray TST as shown in FIG. 9,4×4, that is, 16 IC sockets are arranged and mounted on the tester head104 such that the IC elements (shown as obliquely hatched) in everyfourth row in each of the lines may be tested all at one time. Morespecifically, in the first test run the examination is conducted onsixteen IC elements located in the first, fifth, ninth and thirteenthrows in each line, the second test run is effected on another sixteen ICelements located in the second, sixth, tenth and fourteenth rows in eachline by shifting the test tray TST by a distance corresponding to onerow of IC elements, and the third and fourth test runs are carried outin the similar manner until all of the IC elements are tested. The testresults are stored in a memory at the addresses determined by, forinstance, the identification number affixed to the test tray TST and theIC numbers assigned to the IC elements contained in the test tray. It isto be appreciated that where thirty-two IC sockets may be mounted on thetester head 104, only two test runs are required to examine allsixty-four IC elements arranged in an array of 4 lines×16 rows. It isalso to be noted that there is another type of IC handler in which ICsto be tested are transferred from the test tray into a socket mounted onthe tester head 104 and upon the test being completed the tested ICs aretransferred from the socket back onto the test tray to transport theICs, in the test chamber 102.

The IC storage section 200 comprises an IC storage rack (or stocker) 201for accommodating general-purpose trays KST loaded with ICs to be testedand a tested IC storage rack (or stocker) 202 for accommodatinggeneral-purpose trays KST loaded with tested ICs sorted out bycategories on the basis of the test results. The IC storage rack 201 andtested IC storage rack 202 are configured to accommodate general-purposetrays in the form of a stack. The general-purpose trays KST with ICs tobe tested carried thereon and stored in the form of a stack in the ICstorage rack 201 are transported successively from the top of the stackto the loader section 300 where the ICs to be tested (DUTs) aretransferred from the general-purpose tray KST onto a test tray TST onstandby in the loader section 300.

Either of the IC storage rack 201 and any one of the tested IC storageracks 202 comprises, as any one of the IC storage rack 201 and thetested IC storage racks 202 is shown in FIG. 10, a tray supporting frame203 open at the top and having an opening at the bottom, and an elevator204 disposed below the frame 203 so as to be vertically movable throughthe bottom opening. In the tray supporting frame 203 there are storedand supported a plurality of general-purpose trays KST stacked one onanother which are vertically moved by the elevator 204 acting throughthe bottom opening of the frame 203.

In the example illustrated in FIGS. 4 and 5, eight racks STK-1, STK-2, .. . , STK-8 are provided as tested IC storage racks 202 so as to be ableto store tested ICs which may be sorted out into eight categories at amaximum according to the test results. This is because in someapplications tested ICs may not only be classified into categories of"conformable or pass article" and "unconformable or failure article" butalso be subclassified into those having high, medium and low operationspeeds among the "pass" articles and those required to be retested amongthe "failure" articles, and others. Even if the number of classifiablecategories is up to eight, the unloader section 400 in the illustratedexample is capable of accommodating only four general-purpose trays KST.For this reason, if there occur some among the tested ICs which shouldbe classified into a category other than categories assigned to thegeneral-purpose trays KST arranged in the unloader section 400, theprocedures taken are to return one of the general-purpose trays KST fromthe unloader section 400 to the IC storage section 200 and inreplacement to transfer a general-purpose tray KST for storing the ICsbelonging to the new additional category from the IC storage section 200to the unloader section 400 where those ICs are stored in the new tray.

Referring to FIG. 5, a tray transfer means 205 is disposed above the ICstorage rack 201 and the tested IC storage racks 202 for movement overthe entire extent of the storage racks 201 and 202 in the direction ofarrangement of the racks (in the right to left direction of the testingapparatus) relative to the base plate 105. The tray transfer means 205is provided on its bottom with grasp means for grasping ageneral-purpose tray KST. The tray transfer means 205 is moved to aposition over the IC storage rack 201 whereupon the elevator 204 isactuated to lift the general-purpose trays KST stacked in the IC storagerack 201, so that the uppermost general-purpose tray KST may be pickedup by the grasp means of the tray transfer means 205. Once the uppermostgeneral-purpose tray KST loaded with ICs to be tested has beentransferred to the tray transfer means 205, the elevator 204 is loweredto its original position. The tray transfer means 205 is thenhorizontally moved to and stopped at a predetermined position in theloader section 300 where the grasp means of the tray transfer means 205is released to allow the general-purpose tray KST to drop into animmediately underlying tray receiver (not shown). The tray transfermeans 205 from which the general-purpose tray KST has been unloaded ismoved out of the loader section 300. Then, the elevator 204 is movedupward from below the tray receiver having the general-purpose tray KSTdeposited thereon to lift up the tray receiver and hence thegeneral-purpose tray KST loaded with ICs to be tested so that thegeneral-purpose tray KST is kept exposed up through a window 106 formedin the base plate 105.

The base plate 105 is formed in the area overlying the unloader section400 with another two similar windows 106 through which emptygeneral-purpose trays are kept exposed. In this example, each of thewindows 106 is sized to expose two general-purpose trays therethrough.Hence, four empty general-purpose trays are kept exposed up through twowindows 106. Tested ICs are sorted out and stored in these emptygeneral-purpose trays KST according to the categories assigned torespective trays. As with the loader section 300, the four emptygeneral-purpose trays KST are placed on the respective tray receiverswhich are moved up and down by the associated elevators 204. Once onegeneral-purpose tray KST has been fully filled, the tray is lowered fromthe level of the window 16 by the elevator 204 and stored in the traystorage position assigned to said tray by the tray transfer means 205.Indicated by the numeral 206 in FIGS. 4 and 5 is an empty tray storagerack for accommodating empty general-purpose trays KST. From this emptytray storage rack 206, empty general-purpose trays are transported tothe respective windows 106 by the tray transfer means 205 and theelevators 204 and held thereat by the associated elevators 204 to beready for receiving tested ICs.

The construction and operation as described above of the conventional ICtesting apparatus requires that the loader and the unloader sections 300and 400 be arranged in a serial or tandem fashion between the constanttemperature chamber 101 and the temperature-stress removing chamber 103,resulting undesirably in an increase in the transverse width W of thetesting apparatus as measured in the right-left direction (FIG. 5),actually the transverse width W of the handler portion.

As diagrammatically shown in FIG. 11, however, it is often customary toincorporate two handler portions HM1 (principally the upper mechanicalportion in FIG. 5) and HM2 with respect to the single electricalportion, that is, the IC tester portion TES (principally the lowerelectrical portion in FIG. 5) of the IC testing apparatus for measuringthe electrical characteristics of ICs under test by applying testsignals of a predetermined pattern to the ICs so that the combination ofthe two handler portions and the single IC tester portion may beoperated as one IC tester apparatus. Consequently, if each of thehandler portions is oversized in its transverse width W₁, two handlerportions HM1 and HM2 cannot be installed within the extent of thetransverse width W₂ of the IC tester portion TES, but protrudesubstantially beyond the transverse width W₂ of the IC tester portionTES. As a result, where numerous IC testing apparatuses are installed,there would be much waste in the floor space and the number of ICtesting apparatus that can be installed would be significantly limited.

SUMMARY OF THE INVENTION

It is an object of the present invention to provide an IC testingapparatus configured to allow for reducing the transverse width of thehandler portion to thereby narrow the space needed for installing twohandler portions.

According to a first aspect of the present invention, an IC testingapparatus is provided in which a test tray loaded with ICs to be testedin a loader section is subjected to testing as the test tray is movedfrom the loader section sequentially through a constant temperaturechamber, a test chamber and a temperature-stress removing chamber, andwhich is characterized in that the loader section is located in front ofthe constant temperature chamber and that two of the unloader sectionsare located in front of the test chamber and the temperature-stressremoving chamber.

According to a second aspect of the present invention, an IC testingapparatus is provided in which a test tray loaded with ICs to be testedin a loader section is subjected to testing as the test tray is movedfrom the loader section sequentially through a constant temperaturechamber, a test chamber and a temperature-stress removing chamber, andwhich is characterized in that the loader section is located in front ofthe constant temperature chamber, that the heat removing chamber islocated in front of the test chamber, and that the unloader section islocated over the heat removing chamber.

With the construction of the IC testing apparatus according to the firstaspect, the constant temperature chamber, the test chamber and thetemperature-stress removing chamber are arranged transversely inside-by-side relation, so that the entire length of this arrangementdetermines the transverse width of the handler portion. As a result,assuming that each of the constant temperature chamber, the test chamberand the temperature-stress removing chamber is adapted to hold one testtray, it is possible to reduce the transverse width of one handlerportion to the transverse width corresponding to about three test traylengths (major dimensions or dimensions transverse of the testingapparatus). Consequently, the transverse width of the handler portionmay be decreased by one test tray length as compared with theconventional testing apparatus having one unloader section incorporatedtherein.

With the construction of the IC testing apparatus according to thesecond aspect, it is only the constant temperature chamber and the testchamber that are arranged transversely in side-by-side relation, and thetemperature-stress removing chamber is located in front of the testchamber and the unloader section is disposed over the temperature-stressremoving chamber and the loader section is located in front of theconstant temperature chamber. Assuming that each of the constanttemperature chamber and the test chamber is adapted to hold one testtray, it only requires about two test tray lengths to accommodate thetransverse width of the handler portion. Hence, this embodiment providesthe advantage that the transverse width of the handler portion may befurther decreased by one test tray length as compared with the testingapparatus according to the first aspect of the invention.

According to a third aspect of the present invention, an IC testingapparatus is provided in which a test tray loaded with ICs to be testedin a loader section is subjected to testing as the test tray is movedfrom the loader section sequentially through a constant temperaturechamber, a test chamber and a temperature-stress removing chamber, andwhich is characterized in that both the constant temperature chamber andthe temperature-stress removing chamber have respective tray inlets andoutlets provided in their orthogonally intersecting side faces such thatthe test tray is introduced into the constant temperature chamberthrough the front side face and discharged therefrom through the innerlateral side face into the adjoining test chamber from where it ispassed into the temperature-stress removing chamber through the innerlateral side race thereof and discharged therefrom through the frontside face thereof facing orthogonally with respect to the direction ofpassage into the temperature-stress removing chamber (transversedirection), whereby the loader section may be located in front of theconstant temperature chamber and the unloader section may be located infront of the temperature-stress removing chamber.

According to a fourth aspect of the present invention, an IC testingapparatus is provided in which a test tray loaded with ICs to be testedin a loader section is subjected to testing as the test tray is movedfrom the loader section sequentially through a constant temperaturechamber, a test chamber and a temperature-stress removing chamber, andwhich is characterized in that two unloader sections are located infront of both the test chamber and the temperature-stress removingchamber, and that a common X and Y direction transfer means is disposedspanning the two unloader sections so that tested ICs carried on the twotest trays delivered to the two unloader sections respectively may besorted out on the basis of the test results and transferred ontogeneral-purpose trays by the common X and Y direction transfer means.

According to a fifth aspect of the present invention, in the IC testingapparatus according to the fourth aspect, the arrangement is made suchthat the sorting operation is performed with respect to onlygeneral-purpose trays arranged adjacent to each of the unloader sectionswhen the tested ICs are taken from the two unloader sections andtransferred onto the general-purpose trays.

With the construction of the IC testing apparatus according to thefourth and fifth aspects, since the X and Y direction transfer means isused in common with the two unloader sections, the construction issimplified, resulting in reduction of cost. In addition, with the ICtesting apparatus according to the fifth aspect, since the sortingoperation is carried out with respect to only the general-purpose traysarranged adjacent to each of the unloader sections, the sorting speed isincreased, resulting in speeding up the entire testing process.

Further, according to a sixth aspect of this invention, an IC testingapparatus is provided in which a test tray loaded with ICs to be testedin a loader section is subjected to testing as the test tray is movedfrom the loader section sequentially through a constant temperaturechamber, a test chamber and a temperature-stress removing chamber, andwhich is characterized in that a buffer section for temporarily keepingtested ICs sorted out on the basis of the test results is disposedbetween test trays delivered out to the unloader sections andgeneral-purpose trays positioned adjacent to the unloader sections.

With the construction of the IC testing apparatus according to the sixthaspect, the buffer section disposed in the unloader section providesmeans for temporarily keeping tested ICs even if the unloader sectionhappens to lack a particular general-purpose tray assigned to aparticular classification category into which some of tested ICs takenout of the test tray are to be sorted out. This allows for changing thegeneral-purpose trays without interrupting the sorting operation,whereby enhancement of the processing speed is expected.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a plan view schematically illustrating a first embodiment ofthe IC testing apparatus according to the present invention, with thechamber section shown in a perspective-like view;

FIG. 2 is a perspective view schematically illustrating a secondembodiment of the IC testing apparatus according to the presentinvention;

FIGS. 3A, 3B, and 3C are side views for explaining the operation of aportion of the IC testing apparatus shown in FIG. 2;

FIG. 4 is a plan view schematically showing an example of theconventional IC testing apparatus, with the chamber section shown in aperspective-like view;

FIG. 5 is a schematic perspective view of the conventional IC testingapparatus shown in FIG. 4;

FIG. 6 is an exploded perspective view illustrating the construction ofan example of the test tray for use with the IC testing apparatus;

FIG. 7 is a schematic perspective view illustrating how an IC is storedin the test tray shown in FIG. 6;

FIG. 8 is an enlarged cross-sectional view illustrating the manner inwhich the IC under test stored in the test tray shown in FIG. 6 is inelectrical contact with the tester head;

FIG. 9 is a plan view illustrating the order in which the ICs under teststored in the test tray are subjected to testing;

FIG. 10 is an exploded perspective view illustrating the construction ofan IC storage rack or a tested IC storage rack for use with the ICtesting apparatus; and

FIG. 11 is a schematic plan view for explaining the manner in which theIC testing apparatus is operated or run.

BEST MODES FOR CARRYING OUT THE INVENTION

FIG. 1 shows a first embodiment of the IC testing apparatus according tothe present invention. The elements or parts shown in FIG. 1corresponding to those of FIG. 4 are designated by the same referencenumerals and will not be discussed again in detail, unless required. Aswith the conventional example shown in FIG. 4, the IC testing apparatusof the present invention comprises a chamber section 100, an IC storagesection 200 for storing ICs to be tested and ICs already tested andsorted, a loader section 300 where ICs to be tested which a user hasbeforehand loaded on general-purpose trays KST are transferred andreloaded onto a test tray TST capable of withstanding high/lowtemperatures, and an unloader section 400 where the tested ICs whichhave been carried on the test tray TST out of the chamber section 100subsequently to undergoing a test therein are transferred from the testtray TST to the general-purpose trays KST to be reloaded on the latter.The chamber section 100 comprises a constant temperature chamber 101 forimposing temperature stresses of either a designed high or lowtemperature on ICs to be tested loaded on a test tray TST, a testchamber 102 for conducting electrical tests on the ICs under the thermalstress imposed in the constant temperature chamber 101, and atemperature-stress removing chamber 103 for removing the temperaturestress imposed in the constant temperature chamber 101 from the ICshaving undergone the tests in the test chamber 102. The test chamber 102contains therein the tester head 104 of the IC testing apparatus, thetester head 104 serving to apply various testing electric signals to theICs under test electrically contacted therewith and receive responsesignals from the ICs and transmit same to the IC testing apparatus.

The present invention is characterized by the arrangement (construction)wherein the loader section 300 and the unloader section 400 are locatedthis side or in front of the test chamber 102. More specifically, aswill be appreciated from FIG. 1, the loader section 300 is located infront of the constant temperature chamber 101 and the unloader section400 is located in front of the test chamber 102 and thetemperature-stress removing chamber 103. Consequently, in the case wherefour test runs are to be conducted to complete the testing of all of theICs to be tested placed on one test tray TST as discussed hereinabovewith reference to FIG. 9, the test chamber 102 is only required to havea length (transverse of the testing apparatus) equal to the length ofone test tray TST plus the distance through which the test tray TST ismoved by four rows of ICs, as measured in the direction of travel of thetest tray.

In the first embodiment of the present invention shown in FIG. 1, a testtray TST having ICs to be tested loaded thereon in the loader section300 is conveyed into the constant temperature chamber 101 through aninlet formed in the front side thereof. In the constant temperaturechamber 101 the test tray TST is moved downward by the verticaltransport means and then delivered into the test chamber 102 which isconnected with the lower portion of the constant temperature chamber 101in transversely adjacent relation. It is to be appreciated that the testchamber 102 is connected with the constant temperature chamber 101 onthe side face orthogonally intersecting with the side face in which thetray inlet into the constant temperature chamber is formed, so that thetest tray TST is delivered out of the constant temperature chamber 101in a direction perpendicular to the direction in which it has beenintroduced into the constant temperature chamber 101.

The test chamber 102 is maintained at the same temperature as in theconstant temperature chamber 101, and is adapted to test ICs placed onthe test tray TST through the tester head contained therein. Uponcompletion of the test on all of the ICs, the test tray TST is conveyedfrom the test chamber 102 to the temperature-stress removing chamber 103where the tested ICs are relieved of the temperature-stress as the testtray is moved vertically by the associated vertical transport means. Thetest tray is then delivered from the temperature-stress removing chamber103 to the unloader section 400 in a direction perpendicular to thedirection in which it has been introduced from the test chamber 102until it is stopped at a first position A in the unloader section.

In this first embodiment, the unloader section 400 is configured toallow for stopping a test tray TST at two positions A and B. Spanningthe first and second positions A and B is a common X and Y directiontransfer means 404 which operates to sort and pick up tested ICs fromthe test tray TST stopped at the first and second positions A and B onthe basis of the test results and carry them to the general-purposetrays KST₁ -KST₄ for the corresponding categories for storage therein.

The sorting operation will now be described. In the first embodiment,the sorting operation is performed with respect to only general-purposetrays arranged adjacent to each of the first and second positions A andB. Specifically, arranged at the first position A are general-purposetrays KST₁ and KST₂. Let it be assummed that classification categories 1and 2 are assigned to the general-purpose trays KST₁ and KST₂,respectively, while the test tray TST is stopped at the first positionA, only the tested ICs belonging to the categories 1 and 2 are picked upfrom the test tray and transferred onto the correspondinggeneral-purpose trays KST₁ and KST₂, respectively. Once the test trayTST stopping at the first position A has been depleted of the ICsbelonging to the categories 1 and 2, the test tray is moved to thesecond position B.

Arranged at and in opposing relation to the second position B aregeneral-purpose trays KST₃ and KST₄. Assuming that classificationcategories 3 and 4 are allotted to these general-purpose trays KST₃ andKST₄, respectively, the tested ICs belonging to the categories 3 and 4are picked up from the test tray TST held at the second position B, andtransferred onto the corresponding general-purpose trays KST₃ and KST₄,respectively. While the sorting is carried out at the second position B,the next test tray TST is delivered from the temperature-stress removingchamber 103 to the unloader section 400 and is stopped at the firstposition A in preparation for the sorting operation.

Although in the first embodiment the arrangement is such that the X andY direction transfer means 404 is shared by the two unloader sections(represented by the first and second positions A and B), it is stillpossible to reduce the distance for the X and Y direction transfer means404 required to travel for the sorting operation owing to the sortingoperations being limited to the general-purpose trays KST₁, KST₂ andgeneral-purpose trays KST₃, KST₄ adjacent to the test tray stoppositions A and B, respectively. It is thus to be understood that thisconstruction provides the advantage that the overall processing timerequired for the sorting may be shortened, despite the fact that thesingle X and Y direction transfer means 404 is used for the sortingoperation.

It should be noted here that the number of general-purpose trays KSTthat can be installed in the unloader section 400 is limited to four bythe space available in the first embodiment. Hence, the number ofcategories into which ICs can be sorted in real time operation islimited to four as discussed above. While four categories wouldgenerally be sufficient to cover three categories for subclassifying"pass articles" into high, medium and low response speed elements inaddition to one category allotted to "failure article", in someinstances there may be some among the tested ICs which do not belong toany of these categories. Should there be found any tested ICs whichshould be classified into a category other than the four categories, ageneral-purpose tray KST assigned to the additional category should betaken from the IC storage section 200 and be transported into theunloader section 400 to store the ICs of the additional category. Insuch case, it would be needed to transport any one of thegeneral-purpose trays positioned in the unloader section 400 to the ICstorage section 200 for storage therein.

If the replacement of the general-purpose trays is effected in thecourse of the sorting operation, the latter operation would have to beinterrupted. For this reason, in the first embodiment a buffer section405 is disposed between the stop positions A and B for the test tray TSTand the locations of the general-purpose trays KST₁ -KST₄. The buffersection 405 is configured to temporarily keep therein the tested ICsbelonging to a category of rare occurrence.

The buffer section 405 may have a capacity of accommodating, say abouttwenty to thirty ICs and be equipped with a memory portion for storingthe category of ICs placed in IC pockets of the buffer section 405. Thelocations and category of the individual ICs temporarily kept in thebuffer section 405 are thus stored in the memory portion. Between thesorting operations or upon the buffer section 405 being filled with ICs,a general-purpose tray for the category to which the ICs kept in thebuffer section 405 is carried from the IC storage section 200 to theunloader section 400 to receive the ICs. It should be noted that ICstemporarily kept in the buffer section 405 may be scattered over aplurality of categories. In that case, it would be required to transportso many general-purpose trays as the number of categories at a time fromthe IC storage section 200 to the unloader section 400.

FIG. 2 shows a second embodiment of the IC testing apparatus accordingto the present invention. This second embodiment is characterized by theloader section 300 being located this side or in front of the constanttemperature chamber 101, the test chamber 102 being connected with thelower portion of the constant temperature chamber 101 in transverselyadjacent relation, and the unloader section 400 being located inoverlying relation to the temperature-stress removing chamber 103. InFIG. 2, the arms and the other associated components of the X and Ydirection transfer means mounted in the loader section 300 and theunloader section 400 are omitted for clarity of illustration.

According to the second embodiment shown in FIG. 2, the transverse widthW of the handler portion may be reduced to about two test tray lengths.In addition, in this second embodiment, the arrangement is such thatupon completion of the test in the test chamber 102, the test tray TSTis lifted by one tier from the elevation at which it has been passedinto the test chamber prior to being delivered out to thetemperature-stress removing chamber 103. It is to be understood thatvarying the elevations at which the test tray is introduced into anddelivered from the test chamber 102 makes it possible to effectuatesimultaneously the introduction of one test tray and the delivery ofanother one test tray into and from the test chamber 102, resulting inreducing the time required to replace the test trays.

FIGS. 3A, 3B, and 3C illustrate the operation of replacing test traysTST in the test chamber 102. As shown, overlying the tester head 104 inthe test chamber 102 is a pressure means 116 which is connected to avertically movable plate 120 by means of a support rod 121. The supportrod 121 extends to pass through a fixed plate 122 disposed between themovable plate 120 and the pressure means 116. The movable plate 120 andthe fixed plate 122 are connected together by means of two dual cylinderassemblies, each comprising a first cylinder assembly 115 and a secondcylinder assembly 119 which are operable independently of each other toextend and retract their own piston rods. The movable plate 120 has atits both ends a pair of third cylinder assemblies 117 dependingtherefrom to which hooks 118 are connected.

Specifically, FIG. 3A shows the status that the test tray TST has justbeen introduced into the test chamber 102 or that the test has beencompleted. The second cylinder assemblies 119 of the dual cylinderassemblies have their piston rods retracted whereby the movable plate120 is correspondingly lowered. In this position a gap greater than thethickness of one test tray TST is defined between the tester head 104and the pressure means 116. Upon a test tray TST being introduced intothe test chamber 102 and aligned with the IC sockets of the tester head104, it is stopped in place whereupon the first cylinder assemblies 115are actuated to retract their piston rods, whereby the pressure means116 is pressed against the test tray TST to urge the latter against thetester head 104. This brings the ICs under test loaded on the test trayTST into good contact with the IC sockets of the tester head 104 toestablish electrical contact between the ICs and the IC tester portionto thereby ensure that required electrical testing is effected.

Upon the testing being terminated, the first cylinder assemblies 115 areactuated to extend their piston rods, whereby the pressure means 116 israised to the position shown in FIG. 3A. Then, the third cylinderassemblies 117 are energized to extend their rods 118 downwardly asshown in FIG. 3B to engage the hooks mounted to the lower ends of therods 118 with the test tray TST, whereupon the second cylinderassemblies 119 of the dual cylinder assemblies are actuated to extendtheir piston rods. This causes the pressure means 116 and the test trayTST to be raised as shown in FIG. 3C so as to provide a gap greater thanthe thickness of one test tray TST.

Once the test tray TST has been raised, the next test tray TST istransported into the position shown in FIG. 3A. The hooks at the lowerends of the rods 118 also serve as rail means, so that the test tray TSTraised to the position shown in FIG. 3C may be delivered along the railsprovided by the hooks out of the test chamber 102 towards the front intothe temperature-stress removing chamber 103.

It should be reminded here that in testing ICs loaded on the test trayTST by bringing them into electrical contact with the tester head 104,the testing need be conducted in several runs for the reason asdiscussed before. In this second embodiment in which after the testing,the test tray TST is lifted prior to being passed into thetemperature-stress removing chamber 103, the arrangement is such thatwhen the test tray TST is introduced into the test chamber 102, it isinitially carried to the deepest position in the chamber and thereafterindexed backward incrementally by one IC row each time until all of thetest runs are completed as described above. The test chamber has thetray inlet and outlet provided in its side faces perpendicular to eachother. Consequently, if the testing were designed to be carried out asthe test tray was incrementally indexed forward, it would be necessaryto dispose the tray outlet perpendicularly with respect to the terminalend of the test chamber 102. Since a space of transverse dimension isrequired to provide such tray outlet, disposing the tray outletperpendicularly with respect to the terminal end of the test chamber 102would need an increased transverse width. This is the reason why in thesecond embodiment the test tray TST is initially carried to the deepestposition in the test chamber 102, followed by being incrementallyindexed backward by one IC row each time.

As discussed hereinabove, according to the IC testing apparatus of thefirst embodiment, the transverse width W of the handler portion may belimited to the total transverse width of the constant temperaturechamber 101, the test chamber 102 and the temperature-stress removingchamber 103. It can thus be appreciated that the transverse width of thehandler portion may be reduced to about three times the longitudinaldimension of one test tray TST. As compared with the conventionalhandler portion having as large a transverse width as about five testtray lengths, it is possible to reduce the transverse width of thehandler portion by as much as about two test tray lengths. Even ascompared with the conventional testing apparatus having only oneunloader section incorporated therein, reduction in the transverse widthof the handler portion by one test tray length is possible, as statedhereinbefore. Consequently, even if two handler portions areincorporated for one IC tester portion, an IC testing apparatus with areduced transverse width may be obtained.

According to the IC testing apparatus of the second embodiment, it ispossible to reduce the transverse width W of the handler portion toabout two test tray lengths, since it is only the constant temperaturechamber 101 and the test chamber 102 that are arranged transversely ofthe IC testing apparatus (although the loader section 300 and theunloader section 400 are also transversely arranged, they are locatedeither in front of or in the rear of the constant temperature chamber101 and the test chamber 102). As a result, an IC testing apparatus witha further reduced transverse width may be provided.

In addition, with the testing apparatus according to the presentinvention, it is possible to adopt the arrangement in which a common Xand Y direction transfer means 404 is disposed with respect to anunloader section 400 having two stop positions A and B for a test tray,enabling the reduction by one of the number of X and Y directiontransfer means required and hence leading to reduction of cost.Moreover, in sorting out ICs from the test tray TST held still at thefirst and second stop positions A and B, it is so arranged that thesorting operation is carried out with respect to only general-purposetrays arranged adjacent to the respective stop positions A and B, whichprovides the advantage of shortening the time required for the sortingoperation.

Further, according to the IC testing apparatus of the present invention,the buffer section 405 disposed between the unloader section 400 and theadjacent general-purpose trays provides means for temporarily keepingany tested ICs that may happen to belong to a classification category orcategories other than particular, say four categories allocated to thegeneral-purpose trays KST₁ -KST₄. This allows for continuing the sortingoperation while any one or more of the allocated general-purpose traysis replaced with a new general-purpose tray for the other category orcategories taken from the IC storage section 200. Consequently, even inthis case, the sorting operation may be carried out in a short time.

While ICs are illustrated as a semiconductor device in the foregoingdescription, it is needless to say that the present invention is alsoapplicable to a testing apparatus for testing semiconductor devicesother than ICs with equal functional effects.

What is claimed is:
 1. A semiconductor device testing apparatuscomprising:a loader section, a constant temperature chamber locateddirectly adjacent said loader section, a test chamber located directlyadjacent said constant temperature chamber, said test chamber containinga tester head disposed therein, a temperature-stress removing chamberlocated directly adjacent said tester- chamber, and two unloadersections, wherein a plurality of semiconductor devices to be tested areloaded onto a test tray transported into said loader section, said testtray loaded with said semiconductor devices is transported into saidconstant temperature chamber where a temperature stress of a desiredtemperature is imposed on said semiconductor devices, said test tray isthen moved into said test chamber where the semiconductor devicescarried on said test tray are brought into electrical contact with saidtester head to test them for their electrical characteristics with thetest results being stored for each of said semiconductor devices, uponcompletion of the testing said test tray is moved into saidtemperature-stress removing chamber where the tested semiconductordevices are relieved of the temperature stress of either a high or lowtemperature imposed in said constant temperature chamber, said test trayloaded with said temperature stress-relieved tested semiconductor deviceis delivered out to said two unloader sections where the testedsemiconductor devices on said test tray are sorted out into passarticles and failure articles on the basis of said stored test results,followed by said pass and failure articles being transferred ontocorresponding general-purpose trays, said constant temperature chamber,said test chamber and said temperature-stress removing chamber aredisposed in a transverse direction of the apparatus in a side-by-siderelation to form a transverse row therewith; said loader section islocated in front of said constant temperature chamber in a front view ofthe apparatus in such a manner that a direction of supply of the testtray from the loader section to the constant temperature is at an angleof 90° to said transverse row in a plane view of the apparatus; and saidtwo unloader sections are located in front of said test chamber and saidtemperature-stress removing chamber in a front view of the apparatus,respectively, in such a manner that a direction of supply of the testtray from the temperature-stress removing chamber to one of the twounloader sections is at an angle of 90° with respect to said transverserow, in the plane view of the apparatus.
 2. The semiconductor devicetesting apparatus according to claim 1, whereineach of said constanttemperature chamber and said temperature-stress removing chamber has atest tray inlet and a test tray outlet formed therein in perpendicularrelation to each other; each of said constant temperature chamber andsaid temperature-stress removing chamber contains therein a verticaltransport means for transporting the test tray in a vertical directionwhile maintaining it in a horizontal attitude; and said loader sectionand said unloader section are disposed in substantially the same plane.3. The semiconductor device testing apparatus according to claim 1,wherein a common X and Y direction transfer means spanning said twounloader sections is provided, said common X and Y direction transfermeans sorting out and picking up the tested semiconductor devices fromboth of the test trays as delivered out to said two unloader sectionsrespectively on the basis of said test results and to transfer thesemiconductor devices onto corresponding general-purpose trays.
 4. Thesemiconductor device testing apparatus according to claim 3, furthercomprising a buffer section disposed between the test tray stopped atone of said unloader sections and general-purpose trays disposedadjacent to said unloader sections for storing the tested semiconductordevices therein, said buffer section being adapted to temporarily keeptested semiconductor devices.
 5. The semiconductor device testingapparatus according to claim 1, whereinthe unloader section located infront of said test chamber is a first unloader section while theunloader section located in front of said temperature-stress removingchamber is a second unloader section; general-purpose of differentcategories trays are disposed adjacent to said first and second unloadersections, respectively; wherein in said first unloader section only thetested semiconductor devices belonging to categories allotted to saidgeneral-purpose trays adjacent to said first unloader section are takenfrom the test trays as delivered out to said first unloader section andthen transferred onto the corresponding general-purpose trays andthereafter said test tray is passed to said second unloader section; andin said second unloader section only those of the tested semiconductordevices belonging to categories allotted to said general-purpose traysadjacent to said second unloader section are taken from the test tray aspassed to said second unloader section and then transferred onto thecorresponding general-purpose trays.
 6. A semiconductor testingapparatus designed to have less transverse width in a transversedirection of the apparatus than that of earlier such testingapparatuses, said testing apparatus comprising:two unloader sections; aconstant temperature chamber; a test chamber; a temperature-stressremoving chamber; and a loader section; whereinsaid constant temperaturechamber, said test chamber and said temperature-stress removing chamberare disposed in the transverse direction of said apparatus in aside-by-side relation, with no elements being placed therebetween; saidloader section is disposed in front of the constant temperature chamberin a front view of the apparatus in such a manner that a direction ofsupply of the test tray from the loader section to the constanttemperature chamber is at an angle of 90° to said transverse directionof the apparatus in a plane view of the apparatus; and said two unloadersections are disposed in front of said test chamber and saidtemperature-stress removing chamber, in a front view of the apparatus,respectively, in such a manner that a direction of supply of the testtray from the temperature-stress removing chamber to one of the twounloader sections is at an angle of 90° to said transverse direction, inthe plane view of the apparatus.
 7. A semiconductor device testingapparatus comprising:a loader section; a constant temperature chamber ofa vertically elongated shape having a test tray inlet formed in a frontface thereof at an uppermost extent of the constant temperature chamberand a test tray outlet formed in a side face thereof at a lowermostextent of the constant temperature chamber in a perpendicular relationto the inlet thereof; a test chamber having a test tray inlet and a testtray outlet; a temperature-stress removing chamber of a verticallyelongated shape having a test tray inlet formed in a side face thereofat a lowermost extent of the temperature-stress removing chamber and atest tray outlet formed in a front face thereof at an uppermost extentof the temperature-stress removing chamber in perpendicular relation tothe inlet thereof; and unloader means having a test tray inlet formed ina back side thereof and a test tray outlet formed in a perpendicularrelation to the inlet thereof; wherein said loader section is disposedin front of said constant temperature chamber in a front view of theapparatus in such a manner that the test tray outlet of the loadersection and the test tray inlet of the constant temperature chamber arealigned in a line at an angle of 90° to a transverse direction, wherebya test tray loaded with semiconductor devices to be tested is derivedout of the test tray outlet of the loader section and transported intothe test tray inlet of the constant temperature chamber along the line,said constant temperature chamber, said test chamber and saidtemperature-stress removing chamber are disposed in a side-by-siderelation to form a first row therewith in a transverse direction of theapparatus in such a manner that the test tray outlet of said constanttemperature chamber and the test tray inlet of said test chamber aredirectly connected together, and the test tray outlet of said testchamber and the test tray inlet of said temperature-stress removingchamber are directly connected together, whereby the test tray loadedwith the semiconductor devices is transported out of the constanttemperature chamber through the test chamber where desired tests areperformed on the semiconductor devices to the temperature-stressremoving chamber along the first row, said unloader means is disposed infront of said temperature-stress removing chamber and said test chamberin the front view of the apparatus in such a manner that the test trayoutlet of said temperature-stress removing chamber and the test trayinlet of said unloader means are aligned in another line which is at anangle of 90° with respect to the transverse direction of the apparatus,whereby the test tray loaded with the semiconductor devices thus testedis derived out of the temperature-stress removing chamber andtransported into the unloader means, and said unloader means and saidloader section are disposed in a side-by-side relation parallel to thetransverse direction of the apparatus in such a manner that the testtray outlet of the unloader means and the test tray inlet of the loadersection are connected together, to thereby form a second row therewith,which row is disposed in front of said first row when viewed from afront to a back side of the apparatus, whereby the tested semiconductordevices loaded on the test tray are transferred from the test tray togeneral-purpose trays of different categories in accordance with testresults by said unloader means and a vacant test tray is transportedback to the loader section.
 8. The semiconductor device testingapparatus according to claim 7, wherein said unloader means has a firstunloader section and a second unloader section disposed in aside-by-side relation together with the loader section to form thesecond row therewith,said first unloader section is located in front ofsaid temperature-stress removing chamber in the front view of theapparatus and having a test tray inlet which is directly connected tothe test tray outlet of the temperature-stress removing chamber, saidsecond unloader section is disposed in front of said test chamber in thefront view of the apparatus, and positions between the first unloadersection and the loader section, whereby the test tray is transportedback from the first unloader section through the second unloader sectionto the loader section.
 9. The semiconductor device testing apparatusaccording to claim 7, whereinsaid constant temperature chamber hasvertical transport means for transporting the test tray thus suppliedinto the test tray inlet thereof downward from the test tray inlet tothe test tray outlet thereof, and said temperature-stress removingchamber has vertical transport means for transporting the test tray thussupplied in the test tray inlet thereof upward from the test tray inletto the test tray outlet thereof, and the test tray outlet of saidunloader means and the test tray inlet of said loader section aredisposed in substantially the same plane vertically higher than that ofthe first row.
 10. A semiconductor device testing apparatus comprising:aloader section loading a plurality of semiconductor devices to be testedonto a test tray; a constant temperature chamber having a vertical testtray path for applying a desired temperature-stress to the semiconductordevices carried therethrough by a test tray, a test tray inlet formed atan uppermost extent of the vertical path, and a test tray outlet formedat a lowermost extent of the vertical path in a perpendicular relationto the test tray inlet; a test chamber having a test tray inlet and atest tray outlet for performing desired tests on the semiconductordevices; a temperature-stress removing chamber having a test tray inletand a test tray outlet formed in a perpendicular relation to the testtray inlet thereof for removing the temperature-stress from thesemiconductor devices thus tested; and unloader means having a test trayinlet and a test tray outlet formed in a perpendicular relation to thetest tray inlet thereof for transferring the tested semiconductordevices from the test tray to general-purpose trays of differentcategories based on test results; wherein said constant temperaturechamber, said test chamber and said temperature-stress removing chamberare disposed in a side-by-side relation in a transverse direction of theapparatus in such a manner that the test tray outlet of said constanttemperature chamber and the test tray inlet of said test chamber aredirectly connected together, and the test tray outlet of said testchamber and the test tray inlet of said temperature-stress removingchamber are directly connected together, to thereby form a first rowtherewith, said loader section and said unloader means are disposed in aside-by-side relation in the transverse direction in such a manner thatthe test tray outlet of the unloader means and the test tray inlet ofthe loader section are connected together, to thereby form a second rowtherewith, which is disposed in front of said first row when viewed froma front to a back side of the apparatus, said loader section is disposedin front of said constant temperature chamber so that the test trayoutlet of the loader section and the test tray inlet of the constanttemperature chamber are aligned in a line perpendicular to saidtransverse direction and directly connected together, and said unloadermeans is disposed in front of said temperature-stress removing chamberand said test chamber in such a manner that the test tray outlet of saidtemperature-stress removing chamber and the test tray inlet of saidunloader means are aligned in another line perpendicular to saidtransverse direction and directly connected together.
 11. Asemiconductor device testing apparatus comprising:a plurality of testtrays each carrying semiconductor devices to be tested; a loader sectionloading semiconductor devices to be tested onto the test trays:aconstant temperature chamber receiving the test tray from the loadersection and applying a desired temperature-stress to the semiconductordevices to be tested which are introduced therein by the test tray; atest chamber receiving the test tray from the constant temperaturechamber and applying desired tests to the semiconductor devices to betested which are introduced therein by the test tray; atemperature-stress removing chamber receiving the test tray from theconstant temperature chamber, and removing the temperature-stress fromthe tested semiconductor devices which are introduced therein by thetest tray; a first unloader section receiving the test tray from thetemperature-stress removing chamber and unloading the testedsemiconductor devices which are introduced therein by the test tray intogeneral-purpose trays of first classified categories in accordance withtest results; and a second unloader sections receiving the test trayfrom the first unloader section, and unloading any of the semiconductordevices remained on the test tray introduced therein intogeneral-purpose trays of second classified categories in accordance withtest results to thereby obtain the test tray in vacant state, which issupplied to the loader section; wherein said constant temperaturechamber, said test chamber and said temperature-stress removing chamberare arranged in a side-by-side relation in a transverse direction of theapparatus to form a first transverse row therewith, said loader sectionand said first and second unloader sections are arranged in aside-by-side relation in the transverse direction of the apparatus toform a second transverse row therewith, and said first and secondtransverse rows are disposed in parallel to each other in a plane viewof the apparatus in such a manner that the loader section is located infront of said constant temperature chamber, that the first unloadersection is located in front of the temperature-stress removing chamber,and that the second unloader section is located in front of the testchamber, respectively, in a front view of the apparatus.
 12. Asemiconductor device testing apparatus according to claim 11wherein:each of the constant temperature chamber and thetemperature-stress removing chamber includes vertical tray transportmeans for transporting the test trays in a vertical direction whilemaintaining the horizontal attitude thereof, and the loader section andthe unloader section are arranged substantially in the same plane.
 13. Asemiconductor device testing apparatus according to claim 11, furthercomprising common transport means, which spans across the two unloadersections, for sorting and picking-up of the tested semiconductor devicesfrom the two test trays respectively transported to the two unloadersections, on the basis of the test results, and for transporting in ahorizontal plane the semiconductor devices on to correspondinggeneral-purpose trays.
 14. A semiconductor device testing apparatusaccording to claim 13, wherein a buffer section is arranged between thetest tray stopped at both two unloader sections and the general-purposetrays installed in the unloader section, and temporarily holds thetested semiconductor devices which are to be thereafter picked up andtransferred to general-purpose trays of corresponding categories.
 15. Asemiconductor device testing apparatus according to claim 11,wherein:general-purpose trays are respectively arranged adjacent to thefirst and second unloader sections respectively, and in the firstunloader section only those tested semiconductor devices which belong tocategories which are associated with the general-purpose trays arrangedadjacent to the first unloader section are picked up from the test traytransported to the first unloader section and then transported on to thecorresponding, general-purpose trays, and then the test tray is furthermoved to the second unloader section in which only those testedsemiconductor devices which belong to categories which are associatedwith the general purpose trays arranged adjacent to the second unloadersection are picked up from the test tray transported to the secondunloader section, and then transported transferred on to thecorresponding, general-purpose trays.
 16. A semiconductor device testingapparatus according to claim 15, wherein a buffer section is arrangedbetween the test tray stopped at both two unloader sections and thegeneral-purpose trays installed in the unloader section, and temporarilyholds the tested semiconductor devices which are to be thereafter pickedup and transferred to general-purpose trays of corresponding categories.17. A semiconductor device testing apparatus comprising:a plurality oftest trays each carrying semiconductor devices to be tested; a loadersection having a test tray inlet for receiving a vacant test tray,loading semiconductor devices to be tested onto the vacant test tray,and having a test tray outlet for deriving the test tray loaded withsemiconductor devices to be tested, a direction of introduction of thetest tray and a direction of derivation of the test tray being differentat a right angle to each other in a plane view; a constant temperaturechamber having a test tray inlet connected to the test tray outlet ofthe loader section and a test tray outlet formed in different chambersides thereof which extend at a right angle to each other in a planeview of the apparatus, and imposing a desired temperature-stress on thesemiconductor devices to be tested which are introduced therein by thetest tray; a test chamber having a test tray inlet connected to the testtray outlet of the constant temperature chamber and a test tray outletformed opposite to the test tray inlet thereof, and applying desiredtesting on the semiconductor devices to be tested which are introducedtherein by the test tray; a temperature-stress removing chamber having atest tray inlet connected to the test tray outlet of the test chamberand a test tray outlet formed in different chamber sides thereof whichextend at a right angle to each other in the plane view, and removingthe temperature-stress from the tested semiconductor devices introducedby the test tray; a first unloader section having a test tray inletconnected to the test tray outlet of the temperature-stress removingchamber for receiving the test tray with the tested semiconductordevices, unloading the tested semiconductor devices into general-purposetrays of first classified categories in accordance with test results,and having a test tray outlet for outputting the test tray loaded withthe semiconductor devices which are remained due to out of the firstclassified categories, a direction of introduction of the test traytherein and a direction of derivation of the test tray therefrom beingat a right angle to each other in a plane view; and a second unloadersections having a test tray inlet connected to the test tray outlet ofthe first unloader, unloading all the remained semiconductor devicesinto general-purpose trays of second classified categories in accordancewith test results to thereby become the test tray vacant, and having atest tray outlet formed opposite to the test tray inlet thereof andconnected to the test tray inlet of the loader section for supplyingtherefrom the vacant test tray to the loader section; wherein saidconstant temperature chamber, said test chamber and saidtemperature-stress removing chamber are arranged in a side-by-siderelation in a transverse direction of the apparatus to form a firsttransverse row therewith, said loader section and said first and secondunloader sections are arranged in a side-by-side relation in thetransverse direction of the apparatus to form a second transverse rowtherewith, said first and second transverse rows are disposed inparallel to each other in the transverse direction of the apparatus in aplane view of the apparatus in such a manner that the loader section islocated in front of said constant temperature chamber, that the firstunloader section is located in front of the temperature-stress removingchamber, and that the second unloader section is located in front of thetest chamber, respectively, in a front view of the apparatus.
 18. Asemiconductor device testing apparatus designed to have a lesstransverse width in a transverse direction of the apparatus than that ofearlier such testing apparatuses, said testing apparatus comprising:aplurality of test trays each having a transverse width in a transversedirection of the apparatus and carrying semiconductor devices to betested; a loader section having a test tray inlet to which a vacant testtray is introduced, loading semiconductor devices to be tested onto thevacant test tray, and having a test tray outlet for deriving the testtray loaded with semiconductor devices to be tested, a direction ofintroduction of the test tray therein and a direction of derivation ofthe test tray therefrom being at a right angle to each other in a planeview of the apparatus; a constant temperature chamber having a test trayinlet connected to the test tray outlet of the loader section and a testtray outlet formed in different chamber sides thereof which extend at aright angle to each other in the plane view, and imposing a desiredtemperature-stress on the semiconductor devices to be tested which areintroduced therein by the test tray; a test chamber having a test trayinlet connected to the test tray outlet of the constant temperaturechamber and a test tray outlet formed opposite to the test tray inletthereof, and applying desired testing on the semiconductor devices to betested which are introduced therein by the test tray; atemperature-stress removing chamber having a test tray inlet connectedto the test tray outlet of the test chamber and a test tray outletformed in different chamber sides thereof which extend at a right angleto each other in the plane view, and removing the temperature-stressfrom the tested semiconductor devices which are introduced therein bythe test tray; a first unloader section having a test tray inletconnected to the test tray outlet of the temperature-stress removingchamber, unloading the tested semiconductor devices into general-purposetrays of first classified categories in accordance with test results,and having a test tray outlet for outputting the test tray loaded withthe semiconductor devices which are remained due to out of the firstclassified categories, a direction of introduction of the test traytherein and a direction of derivation of the test tray therefrom beingat a right angle to each other in the plane view; and a second unloadersection having a test tray inlet connected to the test tray outlet ofthe first unloader, unloading all the remained semiconductor devicesinto general-purpose trays of second classified categories in accordancewith test results to thereby become the test tray vacant, and having atest tray outlet formed opposite to the test tray inlet thereof andconnected to the test tray inlet of the loader section for supplyingtherefrom the vacant test tray to the loader section; wherein saidconstant temperature chamber, said test chamber and saidtemperature-stress removing chamber are arranged in a side-by-siderelation in a transverse direction of the apparatus to form a firsttransverse row therewith, each of said constant temperature chamber,said test chamber and said temperatures tress removing chamber has atransverse width equal to or larger than that of the test tray, so thatthe first transverse row has a transverse width at least three times aslarge as that of the test tray, said loader section and said first andsecond unloader sections are arranged in a side-by-side relation in thetransverse direction of the apparatus to form a second transverse rowtherewith, each of said loader section and said first and secondunloader sections has a transverse width equal to or larger than that ofthe test tray, so that the second row has at least three times as largeas the transverse width of the test tray, said first and secondtransverse rows are disposed in parallel to each other in the transversedirection of the apparatus in such a manner that the loader section islocated in front of said constant temperature chamber, that the firstunloader section is located in front of the temperature-stress removingchamber, and that the second unloader section is located in front of thetest chamber, respectively, in a front view of the apparatus.
 19. Asemiconductor device testing apparatus comprising:a plurality of testtrays carrying semiconductor devices to be tested; a loader sectionloading the semiconductor devices to be tested onto a vacant test traysupplied thereto; a constant temperature chamber receiving the test traythus loaded with the semiconductor devices from the loader section andapplying a desired temperature-stress to the semiconductor devices; atest chamber receiving the test tray from the constant temperaturechamber and applying a desired test to the semiconductor devices; atemperature-stress removing chamber receiving the test tray with thetested semiconductor devices from the test chamber, and removing thetemperature-stress from the tested semiconductor devices; a firstunloader section receiving the test tray from the temperature-stressremoving chamber, and transferring the tested semiconductor devices intogeneral-purpose trays of different categories in a first classificationaccording to test results; and a second unloader section receiving fromthe first unloader section the test tray loaded with the semiconductordevices which are remained due to in a second classification, andtransferring all the semiconductor devices into general-purpose trays ofdifferent categories in the second classification according to the testresults to thereby obtain the test tray caused to be vacant, which issupplied to the loader section in a cyclic use thereof; wherein each ofsaid loader section, constant temperature chamber, test chamber,temperature-stress removing chamber, and first and second unloadersection has a test tray inlet and a test tray outlet, respectively, saidloader section is supplied with the vacant test tray at the test trayinlet thereof from the second unloader section, and derives the testtray loaded with the semiconductor devices to be tested out of the testtray outlet thereof, a direction of receipt of the test tray and adirection of derivation of the test tray being different at a rightangle to each other in a plane view of the apparatus, said constanttemperature chamber is supplied at the test tray inlet thereof with thetest tray from the loader section, and derives the test tray out of thetest tray outlet thereof, a direction of receipt of the test tray and adirection of derivation of the test tray being different at a rightangle to each other in the plane view, said test chamber is supplied atthe test tray inlet thereof with the test tray from the constanttemperature chamber, and derives the test tray out of the test trayoutlet thereof, a direction of receipt of the test tray and a directionof derivation of the test tray being aligned in a line parallel to thetransverse direction of the apparatus in the plane view, saidtemperature-stress removing chamber is supplied at the test tray inletthereof with the test tray from the test chamber, and derives the testtray out of the test tray outlet thereof, a direction of receipt of thetest tray and a direction of derivation of the test tray being differentat a right angle to each other in the plane view, said first unloadersection is supplied at the test tray inlet thereof with the test trayfrom the temperature-stress removing chamber, and derives the test trayout of the test tray outlet thereof, a direction of receipt of the testtray and a direction of derivation of the test tray being different at aright angle to each other in the plane view, said second unloadersection is supplied at the test tray inlet thereof with the test trayfrom the first unloader section, and derives the test tray out of thetest tray outlet thereof, a direction of receipt of the test tray and adirection of derivation of the test tray being aligned in a lineparallel to the transverse direction of the apparatus in the plane view,said constant temperature chamber, said test chamber and saidtemperature-stress removing chamber are arranged in a side-by-siderelation in a transverse direction of the apparatus by connecting thetest tray outlet of the constant temperature chamber to the test trayoutlet of the test chamber and by connecting the test tray outlet of thetest chamber to the test tray outlet of the temperature-stress removingchamber, to thereby form a first transverse row therewith, said loadersection and said first and second unloader sections are arranged in aside-by-side relation in the transverse direction of the apparatus byconnecting the test tray outlet of the first unloader section to thetest tray inlet of the second unloader section, and by connecting thetest tray outlet of the second unloader section to the test tray inletof the loader section, to thereby form a second transverse rowtherewith, said first row and second row are arranged in parallel toeach other in the transverse direction of the apparatus in the planeview, and said loader section is arranged in front of the constanttemperature chamber and said first unloader section is arranged in frontof the temperature-stress removing chamber, respectively, in the frontview of the apparatus, so that the second unloader section is located infront of the test chamber.
 20. A semiconductor device testing apparatuscomprising:a plurality of test trays each carrying semiconductor devicesto be tested; a loader section loading semiconductor devices to betested onto the test-trays:a constant temperature chamber applying adesired temperature-stress to the semiconductor devices to be tested; atest chamber applying desired tests to the semiconductor devices to betested; a temperature-stress removing chamber removing thetemperature-stress from the tested semiconductor devices; and a firstand a second unloader section each unloading the tested semiconductordevices into general-purpose trays of different classified categoriesbased on test results; wherein said loader section is disposed in frontof the constant temperature chamber in a front view of the apparatus sothat a test tray loaded with the semiconductor devices to be tested isintroduced from the loader section into the constant temperature chamberalong a direction perpendicular to the transverse direction of theapparatus in a plane view of the apparatus, whereby the desiredtemperature stress is applied to the semiconductor devices loaded on thetest tray, said constant temperature chamber, said test chamber and saidtemperature-stress removing chamber are arranged in a side-by-siderelation in the transverse direction of the apparatus to form a firsttransverse row therewith, whereby the test tray loaded with thesemiconductor devices to which the desired temperature stress have beenapplied is transported, in the first transverse row from the constanttemperature chamber into the test chamber, where the desired test isapplied to the semiconductor devices, and the test tray loaded with thethus tested semiconductor devices is then transported in the firsttransverse row from the test chamber into the temperature-stressremoving chamber, where the temperature-stress is removed from thetested semiconductor devices, said first unloader section is disposed infront of the temperature-stress removing chamber in a front view of theapparatus so that the test tray loaded with the tested semiconductordevices is introduced from the temperature-stress removing chamber intothe first unloader section along a direction perpendicular to thetransverse direction of the apparatus in the plane view of theapparatus, whereby the tested semiconductor devices are unloaded intogeneral-purpose trays of different categories in a first classificationbased on test results, said first and second unloader sections andloader section are arranged in a side-by-side relation in the transversedirection of the apparatus to form a second transverse row therewith,whereby the test tray loaded with the tested semiconductor devices whichare remained due to out of the first classification is transported inthe second transverse row from the first unloader section into thesecond unloader section, where the remained semiconductor devices areunloaded into general-purpose trays of different categories in a secondclassification based on the test results, and the test tray thus emptiedis then transported in the second transverse row from the secondunloader section into the loader section, where the test tray isutilized in cyclic use thereof, and said second transverse row isdisposed in parallel to the first transverse row in the plane view ofthe apparatus as well as in front of the first transverse row in thefront view of the apparatus in such an manner that the loader section islocated in front of said constant temperature chamber, that the firstunloader section is located in front of the temperature-stress removingchamber, and that the second unloader section is located in front of thetest chamber, respectively, in a front view of the apparatus.
 21. Thesemiconductor testing apparatus according to claim 20, whereineach ofsaid test trays has a transverse width in a transverse direction of theapparatus, each of said loader section, constant temperature chamber,test chamber, temperature-stress removing chamber and first and secondunloader sections has a transverse width equal to or larger than that ofthe test tray, so that the apparatus has a transverse width which is atleast three times as large as that of the test tray.